| To: | william_lei@ali.com.tw |
|---|---|
| Subject: | Re: How to emulate lw/sw instruction by lb/sb instruction |
| From: | Jim Wilson <wilson@specifix.com> |
| Date: | Wed, 27 Sep 2006 13:14:11 -0700 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <OFCDEA2C7E.BF7FD296-ON482571F4.0039233C-482571F4.003A3A12@LocalDomain> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <OFCDEA2C7E.BF7FD296-ON482571F4.0039233C-482571F4.003A3A12@LocalDomain> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Mon, 2006-09-25 at 18:35 +0800, william_lei@ali.com.tw wrote: > Because there are some aligned instruction will load/store from/to > unaligned base address in some module,such as "lw t0,56(sp) ##sp is odd > address" You are better off fixing your code. SP must always be aligned to an 8 byte boundary minimum, 16 bytes for the New ABIs. Changing gcc would be difficult, and it isn't even clear if such a change can be made to work. If it is possible, the resulting code will likely be so bad as to be nearly useless. -- Jim Wilson, GNU Tools Support, http://www.specifix.com |
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