| To: | william_lei@ali.com.tw |
|---|---|
| Subject: | Re: How to emulate lw/sw instruction by lb/sb instruction |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Mon, 25 Sep 2006 12:05:32 +0100 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <OF041A6F77.FC0AA7D2-ON482571F4.00036CCB-482571F4.0003EC56@LocalDomain> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <OF041A6F77.FC0AA7D2-ON482571F4.00036CCB-482571F4.0003EC56@LocalDomain> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.2.1i |
On Mon, Sep 25, 2006 at 08:41:53AM +0800, william_lei@ali.com.tw wrote: > Dear all > Could someone tell me how to modify GCC as titled?because we have met > problem while porting some middleware,which will generate some lw/sw > instruction to unaligned address,so I would modify GCC to not generate > lw/sw instructions for this pieces code. You can use gcc's __attribute__((packed)) to define a data structure that does not have any alignment gaps in it. Gcc will then use unaligned loads and stores to access this structure. This however is a kludge, for best performance you should redefine the data structures your code is working to avoid such missalignment. Otoh if the miss-alignment case is rare only then you may actually be better off by relying on the kernel's handling of this case. Ralf |
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