Hi Nemoto-san,
On Fri, 22 Sep 2006 14:16:34 +0900 (JST)
Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote:
> On Fri, 22 Sep 2006 01:07:13 +0900, Yoichi Yuasa
> <yoichi_yuasa@tripeaks.co.jp> wrote:
> > Some mtc0_tlbw_hazard() were broken by "[MIPS] Cleanup hazard handling"
> > patch.
> ...
> > Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
> >
> > diff -pruN -X mips/Documentation/dontdiff
> > mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
> > --- mips-orig/include/asm-mips/hazards.h 2006-09-21 18:21:11.793973750
> > +0900
> > +++ mips/include/asm-mips/hazards.h 2006-09-21 18:55:07.569201750 +0900
> > @@ -138,7 +138,7 @@ ASMMACRO(back_to_back_c0_hazard,
> > * Mostly like R4000 for historic reasons
> > */
> > ASMMACRO(mtc0_tlbw_hazard,
> > - b . + 8
> > + nop; nop; nop; nop; nop; nop
> > )
> > ASMMACRO(tlbw_use_hazard,
> > nop; nop; nop; nop; nop; nop
> > @@ -169,7 +169,7 @@ ASMMACRO(back_to_back_c0_hazard,
> > * processors.
> > */
> > ASMMACRO(mtc0_tlbw_hazard,
> > - b . + 8
> > + nop; nop; nop; nop; nop; nop
> > )
> > ASMMACRO(tlbw_use_hazard,
> > nop; nop; nop; nop; nop; nop
> >
>
> The root problem would be new ASMMACRO lacks .set noreorder.
>
> Here is my proposal.
It's OK for me.
I tested on VR41xx and Cobalt Qube2(Nevada).
Yoichi
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