[PATCH] use proper hazard macro instead of BARRIER

[Atsushi Nemoto <anemo@mba.ocn.ne.jp>]

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>

diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index a681f57..3bf5e8a 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -38,11 +38,6 @@ #include <asm/pgalloc.h>
 #include <asm/tlb.h>
 #include <asm/fixmap.h>
 
-/* CP0 hazard avoidance. */
-#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
-                                    "nop; nop; nop; nop; nop; nop;\n\t" \
-                                    ".set reorder\n\t")
-
 /* Atomicity and interruptability */
 #ifdef CONFIG_MIPS_MT_SMTC
 
@@ -161,7 +156,7 @@ #ifdef CONFIG_MIPS_MT_SMTC
        /* preload TLB instead of local_flush_tlb_one() */
        mtc0_tlbw_hazard();
        tlb_probe();
-       BARRIER;
+       tlb_probe_hazard();
        tlbidx = read_c0_index();
        mtc0_tlbw_hazard();
        if (tlbidx < 0)