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Re: [PATCH] fast path for rdhwr emulation for TLS

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: [PATCH] fast path for rdhwr emulation for TLS
From: Thiemo Seufer <ths@networkno.de>
Date: Mon, 11 Sep 2006 10:49:05 +0100
Cc: nigel@mips.com, ralf@linux-mips.org, dan@debian.org, macro@linux-mips.org, linux-mips@linux-mips.org
In-reply-to: <20060911.175029.37531637.nemoto@toshiba-tops.co.jp>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20060909.225641.41198763.anemo@mba.ocn.ne.jp> <450491FA.3010600@mips.com> <20060911.140403.126141483.nemoto@toshiba-tops.co.jp> <20060911.175029.37531637.nemoto@toshiba-tops.co.jp>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.13 (2006-08-11)
Atsushi Nemoto wrote:
[snip]
> @@ -375,6 +376,72 @@ #endif
>       BUILD_HANDLER dsp dsp sti silent                /* #26 */
>       BUILD_HANDLER reserved reserved sti verbose     /* others */
>  
> +     .align  5
> +     LEAF(handle_ri_rdhwr_vivt)
> +#ifdef CONFIG_MIPS_MT_SMTC
> +     PANIC_PIC("handle_ri_rdhwr_vivt called")
> +#else
> +     .set    push
> +     .set    noat
> +     .set    noreorder
> +     /* check if TLB contains a entry for EPC */
> +     MFC0    k1, CP0_ENTRYHI
> +     andi    k1, 0xff        /* ASID_MASK */
> +     MFC0    k0, CP0_EPC
> +     PTR_SRL k0, PAGE_SHIFT + 1
> +     PTR_SLL k0, PAGE_SHIFT + 1
> +     or      k1, k0
> +     MTC0    k1, CP0_ENTRYHI
> +     mtc0_tlbw_hazard
> +     tlbp

This needs a .set mips3/.set mips0 pair.

> +#ifdef CONFIG_CPU_MIPSR2
> +     _ehb                    /* tlb_probe_hazard */
> +#else
> +     nop; nop; nop; nop; nop; nop    /* tlb_probe_hazard */
> +#endif

What about a mtc0_tlbp_hazard macro here?


Thiemo

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