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Re: single step in MIPS

To: "Ralf Baechle" <>
Subject: Re: single step in MIPS
From: "Nida M" <>
Date: Thu, 7 Sep 2006 11:52:14 +0530
Cc: "Kevin D. Kissell" <>,
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References: <> <000b01c6cea8$7d480fa0$a803a8c0@Ulysses> <> <>
Insert a breakpoint instruction after the instruction you want to single
step. Anything that triggers an exception but typicall a "break 0" would
be used for debuggers.  Branches need special care.  Either they need to
be executed in software or breakpoints at both the branch-taken and the
not-taken address need to be inserted.

Instead of break 0, can I use  Trap Exception 'Tr'  with the special
case for single step BRK_SSTEPBP (break 5)
E.g : teq rs,rt,code

     which is nothing but :
     bne rs,rt,1f
     break code

....... ???
And with all those hints I leave the special case of instructions in
branch delay slots to the you, I'm sure you'll find it trivial ;-)

Thanks,I think i will do that


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