| To: | ralf@linux-mips.org |
|---|---|
| Subject: | Re: [PATCH] fix cache coherency issues |
| From: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| Date: | Fri, 25 Aug 2006 00:12:21 +0900 (JST) |
| Cc: | nigel@mips.com, linux-mips@linux-mips.org |
| In-reply-to: | <20060824121205.GA22587@linux-mips.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20060824111515.GA4490@linux-mips.org> <20060824.203838.07455316.nemoto@toshiba-tops.co.jp> <20060824121205.GA22587@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Thu, 24 Aug 2006 13:12:05 +0100, Ralf Baechle <ralf@linux-mips.org> wrote: > I figured it was worth a try. It means the process will start running with > a hot copy of the COW page instead of a cold copy and I can use hit > invalidates instead of hit wbinv on the kernel address of the to page. > > Lmbenching now, stay tuned ... Hmm, if we could invalidate _before_ copy_page() and writeback (without invalidate) _after_ the copy, it might be worth. --- Atsushi Nemoto |
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