| To: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
|---|---|
| Subject: | Re: [PATCH] fix cache coherency issues |
| From: | Nigel Stephens <nigel@mips.com> |
| Date: | Wed, 23 Aug 2006 17:52:25 +0100 |
| Cc: | linux-mips@linux-mips.org, ralf@linux-mips.org |
| In-reply-to: | <20060824.003130.25910593.anemo@mba.ocn.ne.jp> |
| Organization: | MIPS Technologies |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20060214.011508.41198724.anemo@mba.ocn.ne.jp> <20060523.003424.104640954.anemo@mba.ocn.ne.jp> <20060824.003130.25910593.anemo@mba.ocn.ne.jp> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Thunderbird 1.5.0.2 (X11/20060501) |
Atsushi Nemoto wrote: > > + unsigned int tlbidx; > > ... > + if (tlbidx < 0) > Doesn't tlbidx need to be declared as a signed int, else the compiler could optimize away this comparison. Nigel |
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