| To: | manoje@broadcom.com |
|---|---|
| Subject: | Re: [MIPS] SB1: Build fix: delete initialization of flush_icache_page pointer. |
| From: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| Date: | Wed, 23 Aug 2006 13:16:27 +0900 (JST) |
| Cc: | mark.e.mason@broadcom.com, linux-mips@linux-mips.org, ralf@linux-mips.org, ths@networkno.de |
| In-reply-to: | <710F16C36810444CA2F5821E5EAB7F230A0465@NT-SJCA-0752.brcm.ad.broadcom.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20060818.105105.41197512.nemoto@toshiba-tops.co.jp> <710F16C36810444CA2F5821E5EAB7F230A0465@NT-SJCA-0752.brcm.ad.broadcom.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Mon, 21 Aug 2006 12:27:47 -0700, "Manoj Ekbote" <manoje@broadcom.com> wrote:
> The patch doesn't help. The kernel hangs in the same fashion.
Thank you for testing.
Then I have no idea why the kernel hangs...
Random thoughts:
Does it still hang on init=/bin/sh?
Does enabling second and third "#if 0" blocks in arch/mips/mm/fault.c
show some useful information?
Finally, I think there is no serious reason separating c-sb1.c from
c-r4k.c. The c-r4k.c support both vtagged-icache and pindexed-dcache,
therefore SB1 can use it too.
mm/c-r4k.c:probe_pcache()
switch (c->cputype) {
case CPU_20KC:
case CPU_25KF:
case CPU_SB1:
case CPU_SB1A:
c->dcache.flags |= MIPS_CACHE_PINDEX;
case CPU_R10000:
case CPU_R12000:
case CPU_R14000:
break;
kernel/cpu-probe.c:cpu_probe_sibyte()
#if 0
c->options &= ~MIPS_CPU_4K_CACHE;
c->options |= MIPS_CPU_SB1_CACHE;
#endif
---
Atsushi Nemoto
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