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RE: [MIPS] SB1: Build fix: delete initialization of flush_icache_page po

To: "Atsushi Nemoto" <anemo@mba.ocn.ne.jp>, "Mark E Mason" <mark.e.mason@broadcom.com>
Subject: RE: [MIPS] SB1: Build fix: delete initialization of flush_icache_page pointer.
From: "Manoj Ekbote" <manoje@broadcom.com>
Date: Mon, 21 Aug 2006 12:27:47 -0700
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, ths@networkno.de
In-reply-to: <20060818.105105.41197512.nemoto@toshiba-tops.co.jp>
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Thread-index: AcbCaOFEsOE5SkNVRZCUOrZgnvH0agC7oF4Q
Thread-topic: [MIPS] SB1: Build fix: delete initialization of flush_icache_page pointer.
The patch doesn't help. The kernel hangs in the same fashion. 



>-----Original Message-----
>From: linux-mips-bounce@linux-mips.org 
>[mailto:linux-mips-bounce@linux-mips.org] On Behalf Of Atsushi Nemoto
>Sent: Thursday, August 17, 2006 6:51 PM
>To: Mark E Mason
>Cc: linux-mips@linux-mips.org; ralf@linux-mips.org; ths@networkno.de
>Subject: Re: [MIPS] SB1: Build fix: delete initialization of 
>flush_icache_page pointer.
>
>On Thu, 17 Aug 2006 14:20:07 -0700, "Mark E Mason" 
><mark.e.mason@broadcom.com> wrote:
>> The sb1_flash_icache_page change below breaks causes 1480 kernels to 
>> hang after freeing memory:
>
>Does this (untested) patch work for you?
>
>diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c index 
>4bd9ad8..0f5691a 100644
>--- a/arch/mips/mm/c-sb1.c
>+++ b/arch/mips/mm/c-sb1.c
>@@ -253,6 +253,17 @@ void sb1___flush_cache_all(void)
>       __attribute__((alias("local_sb1___flush_cache_all")));
> #endif
> 
>+static inline void local_sb1_flush_data_cache_page(void * addr) {
>+      __sb1_writeback_inv_dcache_range((unsigned long)addr,
>+                                       (unsigned long)addr + 
>PAGE_SIZE); }
>+
>+static void sb1_flush_data_cache_page(unsigned long addr) {
>+      on_each_cpu(local_sb1_flush_data_cache_page, (void *) 
>addr, 1, 1); }
>+
> /*
>  * When flushing a range in the icache, we have to first writeback
>  * the dcache for the same range, so new ifetches will see 
>any @@ -527,8 +538,8 @@ #endif
>       flush_cache_page = sb1_flush_cache_page;
> 
>       flush_cache_sigtramp = sb1_flush_cache_sigtramp;
>-      local_flush_data_cache_page = (void *) sb1_nop;
>-      flush_data_cache_page = (void *) sb1_nop;
>+      local_flush_data_cache_page = local_sb1_flush_data_cache_page;
>+      flush_data_cache_page = sb1_flush_data_cache_page;
> 
>       /* Full flush */
>       __flush_cache_all = sb1___flush_cache_all;
>
>
>


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