| To: | Geert Uytterhoeven <geert@linux-m68k.org> |
|---|---|
| Subject: | Re: [PATCH] qemu does not have dcache aliases |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Mon, 21 Aug 2006 16:02:46 +0100 |
| Cc: | Atsushi Nemoto <anemo@mba.ocn.ne.jp>, macro@linux-mips.org, Linux/MIPS Development <linux-mips@linux-mips.org> |
| In-reply-to: | <Pine.LNX.4.62.0608211651010.6328@pademelon.sonytel.be> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20060820.003338.25478178.anemo@mba.ocn.ne.jp> <Pine.LNX.4.64N.0608211340120.17504@blysk.ds.pg.gda.pl> <20060821.225910.108307053.anemo@mba.ocn.ne.jp> <20060821144605.GA19032@linux-mips.org> <Pine.LNX.4.62.0608211651010.6328@pademelon.sonytel.be> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.2.1i |
On Mon, Aug 21, 2006 at 04:51:40PM +0200, Geert Uytterhoeven wrote: > Or become fully configurable, to make it match every single MIPS core ever > build? I imagine a special debug CPU type that throws exception when particular problems such as cache aliases, stale I-cache lines, back-to-back cp0 operations and other dangerous or suspisious instructions are detected or more complex and detailed profiling that a processor can offer. Ralf |
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