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Re: [PATCH] TX49 has write buffer

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: [PATCH] TX49 has write buffer
From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Date: Sat, 19 Aug 2006 20:04:24 +0400
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, mlachwani@mvista.com
In-reply-to: <20060819.231132.25910211.anemo@mba.ocn.ne.jp>
Organization: MontaVista Software Inc.
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Hello.

Atsushi Nemoto wrote:

TX49 CPUs have a write buffer, so we need to select CPU_HAS_WB -- otherwise all Toshiba RBTX49xx kernels fail to build.

TX49 CPUs also have a SYNC instruction which flushes a write buffer.
I think it is enough and wbflush() have been abused in
arch/mips/tx4927/ and arch/mips/tx4938/ codes.

How about a patch? I needed the kernel up and running, so I came up with the obvious patch. I don't have no time to fix this assumed abuse. I should also note, that this patch wasn't enough to bring RBTX4938 kernel back to life since rbhma4500_defconfig is broken somewhere so the kernel doesn't output anything on the colsole). If I have some more time, I'll try to investigate what exactly was causing this (I have a working .config)...

WBR, Sergei

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