| To: | Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | [PATCH] remove set_c0_status(ST0_IM) form wrppmc's irq.c |
| From: | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
| Date: | Tue, 20 Jun 2006 23:26:30 +0900 |
| Cc: | linux-mips@linux-mips.org |
| Organization: | TriPeaks Corporation |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| Sender: | linux-mips-bounce@linux-mips.org |
Hi,
mips_cpu_irq_init() does clear_c0_status(ST0_IM) first.
I think that set_c0_status(ST0_IM) isn't necessary.
Yoichi
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
diff -pruN -X mips/Documentation/dontdiff
mips-orig/arch/mips/gt64120/wrppmc/irq.c mips/arch/mips/gt64120/wrppmc/irq.c
--- mips-orig/arch/mips/gt64120/wrppmc/irq.c 2006-06-20 21:17:36.853537000
+0900
+++ mips/arch/mips/gt64120/wrppmc/irq.c 2006-06-20 21:36:41.949101000 +0900
@@ -62,9 +62,6 @@ void gt64120_init_pic(void)
void __init arch_init_irq(void)
{
- /* enable all CPU interrupt bits. */
- set_c0_status(ST0_IM); /* IE bit is still 0 */
-
/* IRQ 0 - 7 are for MIPS common irq_cpu controller */
mips_cpu_irq_init(0);
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