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Re: Instruction error with cache opcode

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: Instruction error with cache opcode
From: John Miller <jamiller1110@cox.net>
Date: Sun, 14 May 2006 21:35:10 -0400
Cc: linux-mips@linux-mips.org
In-reply-to: <20060515.100659.126574393.nemoto@toshiba-tops.co.jp>
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Atsushi Nemoto wrote:
On Sun, 14 May 2006 14:39:42 -0400, John Miller <jamiller1110@cox.net> wrote:
I included asm/cacheops.h from the kernel tree, it is defined there as :

#define Index_Store_Tag_I       0x08

Then how about Fill_I ?

---
Atsushi Nemoto
That got it! Sorry, I had my head up somewhere it was not supposed to be. I do not know how many times I went over cacheops.h and missed the fact that Fill was defined, not Fill_I. One I changed my code to Fill, it built the kernel nicely. It still died before the first printk :) but at least I am a little closer. I got Fill_I out of the See MIPS Run book, it has the same option hex (0x14) as Fill, does anyone know why this changed?

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