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Re: Instruction error with cache opcode

To: jamiller1110@cox.net
Subject: Re: Instruction error with cache opcode
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Mon, 15 May 2006 10:06:59 +0900 (JST)
Cc: linux-mips@linux-mips.org
In-reply-to: <4467796E.8060000@mountolympos.net>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <446735C6.2080306@mountolympos.net> <002a01c67761$253e97f0$0202a8c0@Ulysses> <4467796E.8060000@mountolympos.net>
Sender: linux-mips-bounce@linux-mips.org
On Sun, 14 May 2006 14:39:42 -0400, John Miller <jamiller1110@cox.net> wrote:
> I included asm/cacheops.h from the kernel tree, it is defined there as :
> 
> #define Index_Store_Tag_I     0x08

Then how about Fill_I ?

---
Atsushi Nemoto

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