| To: | Rodolfo Giometti <giometti@linux.it> |
|---|---|
| Subject: | Re: Porting Au1x000 USB host controller on u-boot |
| From: | Sergei Shtylyov <sshtylyov@ru.mvista.com> |
| Date: | Thu, 04 May 2006 21:26:49 +0400 |
| Cc: | Linux-MIPS <linux-mips@linux-mips.org> |
| In-reply-to: | <20060504172131.GF7357@gundam.enneenne.com> |
| Organization: | MontaVista Software Inc. |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20060504095341.GB19913@gundam.enneenne.com> <445A347A.5050507@ru.mvista.com> <445A36E3.4010809@ru.mvista.com> <20060504172131.GF7357@gundam.enneenne.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 |
Hello. Rodolfo Giometti wrote: AND make sure every buffer/TD/ED is written back / invalidated from cache before the OHCI accesses them since the cache coherency on Au1xx0 is b0rken! Or, better yet, access TD/ED (and, if possible, the buffers) via uncached KSEG1 only. Mmm... good suggestion! :) How can I invalidated the cache? Can you please show me some example code? Dig in arch/mips/mm/c-r4k.c... Thanks _a lot_! Rodolfo WBR, Sergei |
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