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RE: Oprofile on sibyte 2.4.18 kernel

To: "Mark E Mason" <mark.e.mason@broadcom.com>
Subject: RE: Oprofile on sibyte 2.4.18 kernel
From: "Shanthi Kiran Pendyala \(skiranp\)" <skiranp@cisco.com>
Date: Tue, 11 Apr 2006 16:09:28 -0700
Cc: "linux-mips" <linux-mips@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Thread-index: AcZamdRoKUMjWTsKT5ersblLdXL9owCa8JOQACmOKlAAA+V1oA==
Thread-topic: Oprofile on sibyte 2.4.18 kernel
Hi Mark,

Thx for the info.

The doc I have has the title 1250_1125-UM100-RDS.pdf. I went back to
docsafe
And looked for the sb1-um100-rds.pdf doc that you mention. 

I thought sb1 is the core and if two of these cores are present it is
labelled 1250 and
If only one is present it is marketed as 1125 ? Is my understanding
wrong ?

Let me look at this document and see if it answers my questions.

Also, yes I was looking at 2.6 git tree, not the CVS tree as I said
below.. Sorry about
That.

Shanthi kiran 

>-----Original Message-----
>From: Mark E Mason [mailto:mark.e.mason@broadcom.com] 
>Sent: Tuesday, April 11, 2006 2:42 PM
>To: Shanthi Kiran Pendyala (skiranp); Ralf Baechle
>Cc: linux-mips
>Subject: RE: Oprofile on sibyte 2.4.18 kernel
>
>Hello,
>
>FYI: don't use the oprofile tools tarball - use the latest 
>from the CVS site on sourceforge.  The last tarball on the 
>website is more than a bit out of date.
>
>I'll follow up on your other questions in a separate email (in 
>a little while....).
>
>/Mark
>
>> 
>> #1: I looked at oprofile-0.9.1 and it lists this event for SB1 in the
>> events/mips/sb1 directory
>> --------------------------------------------------------------
>> ----------
>> ---
>> event:10 counters:1,2,3 um:zero minimum:500 
>> name:DCACHE_FILLED_SHD_NONC_EXC :Dcache is filled (shared, nonc,
>> exclusive)
>> ----------------------------------------------------------------
>> 
>> However this doesn't have an equivalent performance source Listed in 
>> the sibyte manual (table 33 system performance counter sources).
>
>Are you looking in Sb1-UM100-RDS.pdf?  This is in table 95 in 
>my copy, on page 96/97 (section 11).  Also note that the table 
>isn't in order -- event #10 appears on the top of the 2nd 
>page.  It's logical grouping, not numeric.
>
>> #2: how does the mapping from event numbers to performance sources 
>> work for sibyte ?
>> 
>> I looked at the op_model_mipsxx.c file in the 2.6 CVS tree and the 
>> macro it uses doesn't seem to match the format specified for 
>> perf_cnt_cfg register in sibyte.
>
>Are you using the kernel from CVS instead of git?  The SB1 
>oprofile support didn't turn up in the kernel until sometime 
>mid-January, and is only available through the git version 
>(the CVS version of the kernel is long out of date).
>
>HTH,
>Mark
>

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