| To: | unlisted-recipients:; (no To-header on input) |
|---|---|
| Subject: | Re: [PATCH] Fix swap entry for MIPS32 36-bit physical address |
| From: | Sergei Shtylyov <sshtylyov@ru.mvista.com> |
| Date: | Sat, 08 Apr 2006 01:19:11 +0400 |
| Cc: | linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>, Pete Popov <ppopov@embeddedalley.com>, Jordan Crouse <jordan.crouse@amd.com> |
| In-reply-to: | <4436C301.2060001@ru.mvista.com> |
| Organization: | MontaVista Software Inc. |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <B482D8AA59BF244F99AFE7520D74BF9609D4F2@server1.RightHand.righthandtech.com> <4433C9EE.8030402@ru.mvista.com> <4436C301.2060001@ru.mvista.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 |
Hello. Sergei Shtylyov wrote: Additionally, PTEs in MIPS32R2 should have the same layout for the 36-bit physical address case as in MIPS32R1, according to the architecture manuals -- so, fix the #ifdef's. I've decided to tead off that part (incomplete anyway) and move it to a separate patch which I'll post shortly. I'm really not sure that we need that #if defined(CONFIG_CPU_MIPS32) -- it renders CONFIG_64BIT_PHYS_ADDR non-working on all other 32-bit CPUs for which Kconfig entry claims that this support exists:
config 64BIT_PHYS_ADDR
bool "Support for 64-bit physical address space"
depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 ||
CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT
At least RM7000 has the same PTE layout as MIPS32, I guess the others also do. I suspect that the intent was to limit this option to the Alchemy CPUs where it's *really* necessary? WBR, Sergei |
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