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Anyone using marvell 64420 system controller

To: Linux/MIPS Development <linux-mips@linux-mips.org>
Subject: Anyone using marvell 64420 system controller
From: Fuxin Zhang <fxzhang@ict.ac.cn>
Date: Sun, 02 Apr 2006 22:57:45 +0800
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
User-agent: Thunderbird 1.5 (Windows/20051201)
hi,

  We have been puzzled by the strange problems with our new board with
marvell 64420 for nearly one month.

The board is unstable in linux. Using a 2.6.14 kernel it dies very
easily with file system operations;with a 2.4.22 kernel it can survive
a "cp -a /usr /usr1", but diffing two identical files with sizes > 50M
often mistakely reports difference.The diff result is often 32 bytes,but
the first byte is not cache line aligned(in fact,almost always
%cachelinesize == 1).

The results remain true even with ramdisk only and any other pci device
removed from the board. The same mips CPU works well on other boards,
the same kernel with different platform chosen is very stable too. So I
tend to doubt the bridge or its DDR controller.( Is there any possiblity
of platform related code that lead to such problem? )


If anyone has experiences on this chip, could you point us some way out?
It seems we cannot easily reach the marvell's core developers.

Thanks a lot.



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