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Re: bogus packet in ei_receive of 8390.c

To: zzh.hust@gmail.com
Subject: Re: bogus packet in ei_receive of 8390.c
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Mon, 27 Feb 2006 22:40:45 +0900 (JST)
Cc: linux-mips@linux-mips.org
In-reply-to: <50c9a2250602261910t2241cd14ue877361310e29136@mail.gmail.com>
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References: <50c9a2250602261729q543eb515hff7af85153ac779@mail.gmail.com> <20060227.111020.74752419.nemoto@toshiba-tops.co.jp> <50c9a2250602261910t2241cd14ue877361310e29136@mail.gmail.com>
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>>>>> On Mon, 27 Feb 2006 11:10:50 +0800, zhuzhenhua <zzh.hust@gmail.com> said:

>> Even if it is not true ISA, your FPGA should drive ISA-like signals
>> for the chip.  AC timings of these signals should meet the
>> requirements of the chip.  I do not know they are configurable or
>> not.  Do cross-check the 8019 datasheet and the FPGA specification.

zzh> the ethernet just use the sram interface to control IO

So you can check the sram interface's timing satisfy the ethernet
chip's AC timings.  I have no more idea ...

---
Atsushi Nemoto

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