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Re: [PATCH] TX49 MFC0 bug workaround

To: ralf@linux-mips.org
Subject: Re: [PATCH] TX49 MFC0 bug workaround
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Mon, 06 Feb 2006 18:36:55 +0900 (JST)
Cc: macro@linux-mips.org, linux-mips@linux-mips.org
In-reply-to: <20060203144420.GA3375@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20060202172434.GE17352@linux-mips.org> <20060203.111012.130238823.nemoto@toshiba-tops.co.jp> <20060203144420.GA3375@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
>>>>> On Fri, 3 Feb 2006 14:44:20 +0000, Ralf Baechle <ralf@linux-mips.org> 
>>>>> said:
>> So here is a patch against current GIT.

ralf> Okay, applied.

Thanks.  And please apply this also...


Remove TX49XX_MFC0_WAR completely.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>

diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index 229afaa..ad374bd 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -228,9 +228,6 @@
 #ifndef TX49XX_ICACHE_INDEX_INV_WAR
 #define TX49XX_ICACHE_INDEX_INV_WAR    0
 #endif
-#ifndef TX49XX_MFC0_WAR
-#define TX49XX_MFC0_WAR        0
-#endif
 #ifndef RM9000_CDEX_SMP_WAR
 #define RM9000_CDEX_SMP_WAR            0
 #endif

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