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Re: [PATCH] TX49 MFC0 bug workaround

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: [PATCH] TX49 MFC0 bug workaround
From: Sergei Shtylylov <sshtylyov@ru.mvista.com>
Date: Fri, 03 Feb 2006 05:12:47 +0300
Cc: Linux MIPS <linux-mips@linux-mips.org>
In-reply-to: <20060203.101705.41198541.nemoto@toshiba-tops.co.jp>
Organization: MontaVista Software Inc.
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Hello.

Atsushi Nemoto wrote:

On Thu, 02 Feb 2006 21:46:25 +0300, Sergei Shtylylov <sshtylyov@ru.mvista.com> 
said:

If mfc0 $12 follows store and the mfc0 is last instruction of a
page and fetching the next instruction causes TLB miss, the result
of the mfc0 might wrongly contain EXL bit.


sshtylyov>     Hmm, a TLB miss in fetching from KSEG0?!

We can call these inline functions from modules running on KSEG2.

   Hm, I'm still learning Linux/MIPS, and have overlooked #ifdef MODULE. :-<

If I don't mistake, the offending code is in local_irq_disable, local_irq_save, and local_irq_restore macros. The effect would be a crash on any exception taken once interrupts get disabled in a module (*and* that code happens to fall on a page boundary)... nasty. :-(

---
Atsushi Nemoto

WBR, Sergei

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