| To: | linux-mips@linux-mips.org |
|---|---|
| Subject: | Re: [PATCH] local_r4k_flush_cache_page fix |
| From: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| Date: | Thu, 02 Feb 2006 01:37:46 +0900 (JST) |
| Cc: | ralf@linux-mips.org |
| In-reply-to: | <20060201.153154.108306076.nemoto@toshiba-tops.co.jp> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20060201.000356.25911337.anemo@mba.ocn.ne.jp> <20060201.153154.108306076.nemoto@toshiba-tops.co.jp> |
| Sender: | linux-mips-bounce@linux-mips.org |
>>>>> On Wed, 01 Feb 2006 15:31:54 +0900 (JST), Atsushi Nemoto >>>>> <anemo@mba.ocn.ne.jp> said: anemo> BTW, I wonder if current code (with or without this patch) anemo> works properly for physically indexed cache. Though I do not anemo> know if there were physically indexed icache, there are anemo> certainly physically indexed dcache (ex. MIPS 20KC). anemo> For those physically indexed caches, we should use 'pfn' anemo> argument passed to flush_cache_page ? I'm thinking of introducing MIPS_CACHE_PINDEX and 'cpu_has_pindex_dcache'. I guess secondary cache is also physically indexed. Is there any virtually indexed secondary cache ? --- Atsushi Nemoto |
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