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Re: [RFC] Optimize swab operations on mips_r2 cpu

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [RFC] Optimize swab operations on mips_r2 cpu
From: Franck <vagabon.xyz@gmail.com>
Date: Wed, 25 Jan 2006 15:32:22 +0100
Cc: "Kevin D. Kissell" <kevink@mips.com>, linux-mips@linux-mips.org
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References: <cda58cb80601250136p5ee350e6g@mail.gmail.com> <20060125124738.GA3454@linux-mips.org> <cda58cb80601250534r5f464fd1v@mail.gmail.com> <43D78725.6050300@mips.com> <20060125141424.GE3454@linux-mips.org>
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2006/1/25, Ralf Baechle <ralf@linux-mips.org>:
> On Wed, Jan 25, 2006 at 03:11:49PM +0100, Kevin D. Kissell wrote:
>
> > >>>Comments ?
> > >>Looks good aside of the one issue you've already raised yourself:
> > >>
> > >>>+/* FIXME: MIPS_R2 only */
> > >
> > >I was actually asking for advices :)
> > >
> > >I can see only two simple ways to do that:
> > >(a) we can define a couple of new macro ie CONFIG_MIPS32_ISET_R[12]
> > >that can be set depending on the selected CPU;
> > >(b) define a new macro CONFIG_CPU_HAS_WSBH;
> >
> > Don't we already have CONFIG_CPU_MIPS32R2?
>
> We have CPU_MIPS32_R1, CPU_MIPS32_R2, CPU_MIPS64_R1, CPU_MIPS64_R2.
> Based on those we also define CPU_MIPS32, CPU_MIPS64, CPU_MIPSR1,
> and CPU_MIPSR2 as short cuts.
>

hm I should have missed something, but what about CPUs which have
their own CPU_XXX (different form CPU_MIPS32_R[12]) and which are a
mips32-r2 compliant for example ? (I'm thinking of 4KSD for example)

Thanks
--
               Franck

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