| To: | Linux MIPS <linux-mips@linux-mips.org> |
|---|---|
| Subject: | [PATCH] Au1xx0: really set KSEG0 to uncached on reboot |
| From: | Sergei Shtylylov <sshtylyov@ru.mvista.com> |
| Date: | Tue, 17 Jan 2006 21:54:38 +0300 |
| Cc: | Manish Lachwani <mlachwani@mvista.com>, Jordan Crouse <jordan.crouse@amd.com> |
| Organization: | MostaVista Software Inc. |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 |
Hello. Just found really old buglet in AMD Au1xx0 restart code: instead ofmodifying the whole CP0 Config.K0 field to 010b (meaning KSEG0 uncached) before flushing the caches and resetting a board, it only sets bit 1 of that reg. which is effectively a NOP since Config.K0 == 011b as the kernel sets it up (which is also its default value for Au1xx0). WBR, Sergei diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index 65b84db..4ffcced 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -151,7 +151,7 @@ void au1000_restart(char *command)
}
set_c0_status(ST0_BEV | ST0_ERL);
- set_c0_config(CONF_CM_UNCACHED);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
write_c0_wired(0);
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