linux-mips
[Top] [All Lists]

Re: Timer Interrupt

To: Linux MIPS <linux-mips@linux-mips.org>
Subject: Re: Timer Interrupt
From: Bharathi Subramanian <sbharathi@MidasComm.Com>
Date: Tue, 17 Jan 2006 19:43:59 +0530 (IST)
In-reply-to: <Pine.LNX.4.44.0601171226380.1259-100000@bharathi.midascomm.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
On Tue, 17 Jan 2006, Bharathi Subramanian wrote:

> On Mon, 16 Jan 2006, Bharathi Subramanian wrote:
> 
> > We are trying to implement the CPU Clock down feature for saving the 
> > power. In this process, Whenever the CPU is put in 1/2 Clock then the 
> > Timer interrupt is also getting delayed.
> > 
> > Later I found that CPU Counter is used to generate the timer intr. How 
> > to make the Timer interrupt to happen at every 10ms, even if the CPU 
> > is in 1/2, 1/4 or 1/8 of the original clock??
> > 
> > Processor: MIPS 4Kc 32B
>   Kernel   : 2.4.20 with RTLinux Patch
> 
> In mips_timer_ack() function, the new Compare reg value loaded. Here I 
> tried to put new counter value based on the present cpu clock divder 
> setting. But board is getting rebooted.
> 
> Is it the right way to handle this issue?? Anybody faced same
> condition, kindly share your exprience with me.

I read the Linux Porting guide by Junsun. In that,(s)he mention, "Some
CPUs may have a variable CPU frequency which makes CPU counter not
usable as a timer source". Does it mean that, we can't do the CPU
Clock down in MIPS Processor??

Kindly CC the reply.

Thanks :)
-- 
Bharathi S


<Prev in Thread] Current Thread [Next in Thread>