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[PATCH 4/12] sb1a-support

To: linux-mips@linux-mips.org
Subject: [PATCH 4/12] sb1a-support
From: "Andrew Isaacson" <adi@broadcom.com>
Date: Wed, 19 Oct 2005 23:56:20 -0700
In-reply-to: <20051020065320.GA23857@broadcom.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20051020065320.GA23857@broadcom.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.4.2.1i
Add support for SB-1A CPU.

Signed-Off-By: Andy Isaacson <adi@broadcom.com>

 arch/mips/kernel/cpu-probe.c |    3 +++
 arch/mips/kernel/proc.c      |    1 +
 arch/mips/mm/tlbex.c         |    1 +
 include/asm-mips/addrspace.h |    2 +-
 include/asm-mips/cpu.h       |    4 +++-
 5 files changed, 9 insertions(+), 2 deletions(-)

Index: lmo/arch/mips/mm/tlbex.c
===================================================================
--- lmo.orig/arch/mips/mm/tlbex.c       2005-10-19 22:34:08.000000000 -0700
+++ lmo/arch/mips/mm/tlbex.c    2005-10-19 22:34:12.000000000 -0700
@@ -854,6 +854,7 @@
        case CPU_R12000:
        case CPU_4KC:
        case CPU_SB1:
+       case CPU_SB1A:
        case CPU_4KSC:
        case CPU_20KC:
        case CPU_25KF:
Index: lmo/arch/mips/kernel/cpu-probe.c
===================================================================
--- lmo.orig/arch/mips/kernel/cpu-probe.c       2005-10-19 22:34:10.000000000 
-0700
+++ lmo/arch/mips/kernel/cpu-probe.c    2005-10-19 22:34:12.000000000 -0700
@@ -629,6 +629,9 @@
                c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
 #endif
                break;
+       case PRID_IMP_SB1A:
+               c->cputype = CPU_SB1A;
+               break;
        }
 }
 
Index: lmo/arch/mips/kernel/proc.c
===================================================================
--- lmo.orig/arch/mips/kernel/proc.c    2005-10-19 22:34:08.000000000 -0700
+++ lmo/arch/mips/kernel/proc.c 2005-10-19 22:34:12.000000000 -0700
@@ -56,6 +56,7 @@
         [CPU_5KC]      = "MIPS 5Kc",
        [CPU_R4310]     = "R4310",
        [CPU_SB1]       = "SiByte SB1",
+       [CPU_SB1A]      = "SiByte SB1A",
        [CPU_TX3912]    = "TX3912",
        [CPU_TX3922]    = "TX3922",
        [CPU_TX3927]    = "TX3927",
Index: lmo/include/asm-mips/cpu.h
===================================================================
--- lmo.orig/include/asm-mips/cpu.h     2005-10-19 22:34:08.000000000 -0700
+++ lmo/include/asm-mips/cpu.h  2005-10-19 22:34:12.000000000 -0700
@@ -93,6 +93,7 @@
  */
 
 #define PRID_IMP_SB1            0x0100
+#define PRID_IMP_SB1A           0x1100
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT
@@ -194,7 +195,8 @@
 #define CPU_AU1200             59
 #define CPU_34K                        60
 #define CPU_PR4450             61
-#define CPU_LAST               61
+#define CPU_SB1A               62
+#define CPU_LAST               62
 
 /*
  * ISA Level encodings
Index: lmo/include/asm-mips/addrspace.h
===================================================================
--- lmo.orig/include/asm-mips/addrspace.h       2005-10-19 22:34:08.000000000 
-0700
+++ lmo/include/asm-mips/addrspace.h    2005-10-19 22:34:12.000000000 -0700
@@ -162,7 +162,7 @@
 #define TO_PHYS_MASK   _LLCONST_(0x000000ffffffffff)   /* 2^^40 - 1 */
 #endif
 
-#if defined(CONFIG_CPU_SB1)
+#if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
 #define KUSIZE         _LLCONST_(0x0000100000000000)   /* 2^^44 */
 #define KUSIZE_64      _LLCONST_(0x0000100000000000)   /* 2^^44 */
 #define K0SIZE         _LLCONST_(0x0000100000000000)   /* 2^^44 */


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