| To: | linux-mips@linux-mips.org |
|---|---|
| Subject: | [PATCH 1/12] sibyte-fixes |
| From: | "Andrew Isaacson" <adi@broadcom.com> |
| Date: | Wed, 19 Oct 2005 23:54:43 -0700 |
| In-reply-to: | <20051020065320.GA23857@broadcom.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20051020065320.GA23857@broadcom.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.2.1i |
Fix typo in cpu_probe_sibyte
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
arch/mips/kernel/cpu-probe.c | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: lmo/arch/mips/kernel/cpu-probe.c
===================================================================
--- lmo.orig/arch/mips/kernel/cpu-probe.c 2005-10-19 22:34:08.000000000
-0700
+++ lmo/arch/mips/kernel/cpu-probe.c 2005-10-19 22:34:10.000000000 -0700
@@ -618,7 +618,7 @@
* cache code which eventually will be folded into c-r4k.c. Until
* then we pretend it's got it's own cache architecture.
*/
- c->options &= MIPS_CPU_4K_CACHE;
+ c->options &= ~MIPS_CPU_4K_CACHE;
c->options |= MIPS_CPU_SB1_CACHE;
switch (c->processor_id & 0xff00) {
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