Re: [patch 4/5] SiByte fixes for 2.6.12

[Ralf Baechle <ralf@linux-mips.org>]

On Thu, Jun 23, 2005 at 03:27:09PM -0700, Andy Isaacson wrote:

> >  Well, I've had a look at the code and it's such a mess.  Obviously 
> > calling ld_mmu_r4xx0() (or any of the other variants) should not be 
> > compiled conditionally and more specific cases, i.e. based on PRId values 
> > should take precedence.  I'll see if I can make it better.
> 
> I certainly won't argue with a cleanup of arch/mips/mm/cache.c, that
> code has annoyed me from first laying eyes on it...

So just did that, cpu_cache_init is looking bearable now.

  Ralf