linux-mips
[Top] [All Lists]

Re: [patch 4/5] SiByte fixes for 2.6.12

To: Andy Isaacson <adi@hexapodia.org>
Subject: Re: [patch 4/5] SiByte fixes for 2.6.12
From: Ralf Baechle <ralf@linux-mips.org>
Date: Sat, 1 Oct 2005 12:57:26 +0100
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <20050623222709.GC26427@hexapodia.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20050622230151.GA17970@broadcom.com> <Pine.LNX.4.61L.0506231208120.17155@blysk.ds.pg.gda.pl> <20050623144926.GA10216@hexapodia.org> <Pine.LNX.4.61L.0506231601270.17155@blysk.ds.pg.gda.pl> <20050623222709.GC26427@hexapodia.org>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.4.2.1i
On Thu, Jun 23, 2005 at 03:27:09PM -0700, Andy Isaacson wrote:

> >  Well, I've had a look at the code and it's such a mess.  Obviously 
> > calling ld_mmu_r4xx0() (or any of the other variants) should not be 
> > compiled conditionally and more specific cases, i.e. based on PRId values 
> > should take precedence.  I'll see if I can make it better.
> 
> I certainly won't argue with a cleanup of arch/mips/mm/cache.c, that
> code has annoyed me from first laying eyes on it...

So just did that, cpu_cache_init is looking bearable now.

  Ralf

<Prev in Thread] Current Thread [Next in Thread>
  • Re: [patch 4/5] SiByte fixes for 2.6.12, Ralf Baechle <=