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Re: missing data cache flush for signal trampoline on fork

To: linux-mips@linux-mips.org
Subject: Re: missing data cache flush for signal trampoline on fork
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Fri, 30 Sep 2005 12:32:41 +0900 (JST)
Cc: ralf@linux-mips.org
In-reply-to: <20050928.205758.32501424.nemoto@toshiba-tops.co.jp>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20050928.203429.02302175.nemoto@toshiba-tops.co.jp> <20050928.205758.32501424.nemoto@toshiba-tops.co.jp>
Sender: linux-mips-bounce@linux-mips.org
>>>>> On Wed, 28 Sep 2005 20:57:58 +0900 (JST), Atsushi Nemoto 
>>>>> <anemo@mba.ocn.ne.jp> said:
anemo> Sorry, this would corrupt cpu_has_ic_fills_f_dc case.  Revised.

The patch was overkill.  The indexed-flush is required only for
d-cache.  Revised.

diff -u linux-mips/arch/mips/mm/c-r4k.c linux/arch/mips/mm/c-r4k.c
--- linux-mips/arch/mips/mm/c-r4k.c     2005-09-22 10:38:23.000000000 +0900
+++ linux/arch/mips/mm/c-r4k.c  2005-09-30 12:25:14.000000000 +0900
@@ -410,7 +410,11 @@
         * in that case, which doesn't overly flush the cache too much.
         */
        if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID)) {
-               if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) {
+               if (exec && !cpu_has_ic_fills_f_dc) {
+                       r4k_blast_dcache_page_indexed(page);
+                       if (!cpu_icache_snoops_remote_store)
+                               r4k_blast_scache_page_indexed(page);
+               } else if (cpu_has_dc_aliases) {
                        r4k_blast_dcache_page(page);
                        if (exec && !cpu_icache_snoops_remote_store)
                                r4k_blast_scache_page(page);
diff -u linux-mips/arch/mips/mm/c-tx39.c linux/arch/mips/mm/c-tx39.c
--- linux-mips/arch/mips/mm/c-tx39.c    2005-09-05 10:16:59.000000000 +0900
+++ linux/arch/mips/mm/c-tx39.c 2005-09-30 12:26:23.000000000 +0900
@@ -214,7 +214,9 @@
         * in that case, which doesn't overly flush the cache too much.
         */
        if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID)) {
-               if (cpu_has_dc_aliases || exec)
+               if (exec)
+                       tx39_blast_dcache_page_indexed(page);
+               else if (cpu_has_dc_aliases)
                        tx39_blast_dcache_page(page);
                if (exec)
                        tx39_blast_icache_page(page);

---
Atsushi Nemoto

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