| To: | linux-mips@linux-mips.org |
|---|---|
| Subject: | Re: missing data cache flush for signal trampoline on fork |
| From: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| Date: | Thu, 29 Sep 2005 00:09:59 +0900 (JST) |
| Cc: | ralf@linux-mips.org |
| In-reply-to: | <20050928.203429.02302175.nemoto@toshiba-tops.co.jp> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20050928.203429.02302175.nemoto@toshiba-tops.co.jp> |
| Sender: | linux-mips-bounce@linux-mips.org |
>>>>> On Wed, 28 Sep 2005 20:34:29 +0900 (JST), Atsushi Nemoto >>>>> <anemo@mba.ocn.ne.jp> said: anemo> 5. Then flush_cache_page() is called for the stack page, but it anemo> uses user virtual address and Hit_Invalidate_Writeback_D. This anemo> does not flush the cache written by copy_user_page(). This was somewhat wrong. The flush_cache_page() would flush old data on the page allocated for the stack. Anyway this does not flush the cache written by copy_user_page() because new PTE is not established yet. --- Atsushi Nemoto |
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