tx39_flush_cache_range() do nothing if !cpu_has_dc_aliases. It should
flush d-cache and invalidate i-cache since TX39(H2) has separate I/D
cache.
Here is a patch.
diff -u linux-mips/arch/mips/mm/c-tx39.c linux/arch/mips/mm/c-tx39.c
--- linux-mips/arch/mips/mm/c-tx39.c 2005-09-05 10:16:59.000000000 +0900
+++ linux/arch/mips/mm/c-tx39.c 2005-09-28 18:51:43.000000000 +0900
@@ -167,15 +167,16 @@
static void tx39_flush_cache_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end)
{
- struct mm_struct *mm = vma->vm_mm;
+ int exec;
- if (!cpu_has_dc_aliases)
+ if (!(cpu_context(smp_processor_id(), vma->vm_mm)))
return;
- if (cpu_context(smp_processor_id(), mm) != 0) {
+ exec = vma->vm_flags & VM_EXEC;
+ if (cpu_has_dc_aliases || exec)
tx39_blast_dcache();
+ if (exec)
tx39_blast_icache();
- }
}
static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long
page, unsigned long pfn)
---
Atsushi Nemoto
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