| To: | Matej Kupljen <matej.kupljen@ultra.si> |
|---|---|
| Subject: | Re: MIPS SF toolchain |
| From: | Dan Kegel <dank@kegel.com> |
| Date: | Thu, 08 Sep 2005 06:48:19 -0700 |
| Cc: | David Daney <ddaney@avtrex.com>, crossgcc@sources.redhat.com, linux-mips@linux-mips.org |
| In-reply-to: | <1126182122.25393.27.camel@orionlinux.starfleet.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1126098584.12696.19.camel@localhost.localdomain> <431F0850.8090804@avtrex.com> <1126168866.25388.11.camel@orionlinux.starfleet.com> <1126179199.25389.20.camel@orionlinux.starfleet.com> <1126182122.25393.27.camel@orionlinux.starfleet.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/4.0 (compatible;MSIE 5.5; Windows 98) |
Matej Kupljen wrote: I think I found the problem. ....This code is written in sysdeps/mips/setjmp_aux.c in inline assembly. ...This code is written in sysdeps/mips/__longjmp.c in inline assembly.Because I am using sf, there is no need to store those registers, or is it? Can I just #ifdef this code if compiled for sf? Other architectures do things like this, e.g. sysdeps/powerpc/powerpc32/__longjmp-common.S:#ifdef __NO_VMX__ so I don't see why not. In fact, I had to do something similar once to make life possible for ppc405. See http://kegel.com/xgcc3/glibc-ppc-nofpu.patch3 (Hmm, wonder if something like that ever made it in to mainline glibc.) - Dan -- Trying to get a job as a c++ developer? See http://kegel.com/academy/getting-hired.html |
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