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A patch for arch/mips/mm/cache.c

To: linux-mips@linux-mips.org
Subject: A patch for arch/mips/mm/cache.c
From: "Mark Mason" <mason@broadcom.com>
Date: Thu, 18 Aug 2005 09:39:48 -0700
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mozilla Thunderbird 1.0.6-1.1.fc4 (X11/20050720)
Hello all,

The following patch to cache.c rearranges the logic in cpu_cache_init() somewhat to make the detection of the processor via the current_cpu_data.cputype take precedence over the cpu_has_4ktlb test. This seems to make sense, as the cputype test is significantly more specific than the 4ktlb test. It also arranges for the panic() to happen if the 4ktlb test fails as well (the old version would fail silently).

It also happens to fix things so that the SB1/swarm starts booting again.... ;)

Please consider this for inclusion.

Thanks,
Mark


Index: cache.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/mm/cache.c,v
retrieving revision 1.21
diff -u -r1.21 cache.c
--- cache.c     6 Jul 2005 12:08:14 -0000       1.21
+++ cache.c     18 Aug 2005 16:33:31 -0000
@@ -114,16 +114,7 @@
 
 void __init cpu_cache_init(void)
 {
-       if (cpu_has_4ktlb) {
-#if defined(CONFIG_CPU_R4X00)  || defined(CONFIG_CPU_VR41XX) || \
-    defined(CONFIG_CPU_R4300)  || defined(CONFIG_CPU_R5000)  || \
-    defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432)  || \
-    defined(CONFIG_CPU_R5500)  || defined(CONFIG_CPU_MIPS32_R1) || \
-    defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \
-    defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000)
-               ld_mmu_r4xx0();
-#endif
-       } else switch (current_cpu_data.cputype) {
+       switch (current_cpu_data.cputype) {
 #ifdef CONFIG_CPU_R3000
        case CPU_R2000:
        case CPU_R3000:
@@ -156,6 +147,17 @@
                break;
 
        default:
+               if (cpu_has_4ktlb) {
+#if defined(CONFIG_CPU_R4X00)  || defined(CONFIG_CPU_VR41XX) || \
+    defined(CONFIG_CPU_R4300)  || defined(CONFIG_CPU_R5000)  || \
+    defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432)  || \
+    defined(CONFIG_CPU_R5500)  || defined(CONFIG_CPU_MIPS32_R1) || \
+    defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \
+    defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000)
+                       ld_mmu_r4xx0();
+                       break;
+#endif
+               }
                panic("Yeee, unsupported cache architecture.");
        }
 }
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