linux-mips
[Top] [All Lists]

Re: RFH: What are the semantics of writeb() and friends?

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: RFH: What are the semantics of writeb() and friends?
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Date: Fri, 01 Jul 2005 20:53:15 +0100
Cc: David Daney <ddaney@avtrex.com>, linux-mips@linux-mips.org
In-reply-to: <Pine.LNX.4.61L.0507011513320.30138@blysk.ds.pg.gda.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <01049E563C8ECC43AD6B53A5AF419B38098BD2@avtrex-server2.hq2.avtrex.com> <Pine.LNX.4.61L.0507011002520.30138@blysk.ds.pg.gda.pl> <1120218385.12446.16.camel@localhost.localdomain> <Pine.LNX.4.61L.0507011303190.30138@blysk.ds.pg.gda.pl> <1120224708.12446.26.camel@localhost.localdomain> <Pine.LNX.4.61L.0507011513320.30138@blysk.ds.pg.gda.pl>
Sender: linux-mips-bounce@linux-mips.org
On Gwe, 2005-07-01 at 15:43, Maciej W. Rozycki wrote:
>  But that mentions compiler only, not CPU ordering!  I understand the BIU 
> of the issuing CPU and any external hardware is still permitted to 
> merge/reorder these accesses unless separated by wmb()/rmb()/mb() as 

I think the practical situation is that this implies ordering to the bus
interface. It might be interesting to ask the powerpc people their
experience but looking at most PCI drivers they assume this and it would
be expensive not to do so on x86.

>  We have that iob() macro/call as well, so that you can push cycles out of 
> the CPU domain immediately as well, which is equivalent to:

>       mb(); 
>       make_host_complete_writes();

My feeling is the default readb etc are __readb + mb + make_hos...
>  So far I've been able to get away with that iob() function, but if the 
> bus and buffering hierarchy gets even more complicated, there may be more 
> barriers like this needed.

Agreed - and we now have the device model so we can actually do that by
passing a device pointer.


<Prev in Thread] Current Thread [Next in Thread>