| To: | "Maciej W. Rozycki" <macro@linux-mips.org> |
|---|---|
| Subject: | RE: Problems with Intel e100 driver on new MIPS port, was: Advice needed WRT very slow nfs in new port... |
| From: | Geert Uytterhoeven <geert@linux-m68k.org> |
| Date: | Fri, 1 Jul 2005 11:00:20 +0200 (CEST) |
| Cc: | David Daney <ddaney@avtrex.com>, Michael Stickel <michael@cubic.org>, Linux/MIPS Development <linux-mips@linux-mips.org> |
| In-reply-to: | <Pine.LNX.4.61L.0507010953420.30138@blysk.ds.pg.gda.pl> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <01049E563C8ECC43AD6B53A5AF419B38098BD1@avtrex-server2.hq2.avtrex.com> <Pine.LNX.4.61L.0507010953420.30138@blysk.ds.pg.gda.pl> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Fri, 1 Jul 2005, Maciej W. Rozycki wrote:
> On Thu, 30 Jun 2005, David Daney wrote:
> > It seems that it is a memory consistancy problem of some sort. By
> > placing wbflush() after all writes to NIC registers it works. This
> > leads me to think that either the driver is buggy WRT processors that
> > have write-back queues or my implementation (the default implementation)
> > of writeb() and friends is buggy on this processor. Now it could be
> > that all that is needed is wmb() before some of the register writes, but
> > since on my processor they both do the same thing (sync) it is hard to
> > tell.
>
> Most likely that code has only been ever used on i386 systems (who'd want
> to use such a weird Ethernet chip elsewhere?), so don't expect it to be
> terribly sane.
The e100 is a quite popular card, so I'd expect it to be in use on many
platforms.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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