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Re: [patch] blast_scache nop for sc cpus without scache

To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject: Re: [patch] blast_scache nop for sc cpus without scache
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Mon, 27 Jun 2005 13:45:39 +0100 (BST)
Cc: Ralf Baechle <ralf@linux-mips.org>, Florian Lohoff <flo@rfc822.org>, linux-mips@linux-mips.org
In-reply-to: <20050625175048.GA25276@alpha.franken.de>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20050625131938.GA7669@paradigm.rfc822.org> <20050625160316.GP6953@linux-mips.org> <20050625175048.GA25276@alpha.franken.de>
Sender: linux-mips-bounce@linux-mips.org
On Sat, 25 Jun 2005, Thomas Bogendoerfer wrote:

> > > Subject: [patch] blast_scache nop for sc cpus without scache
> > 
> > Interesting.  Which system needs this patch?
> 
> RM400; looks like the secondary cache on the cpu module isn't normally
> attached, but like the board caches on den Indy. CONF_SC isn't set
> in cp0 config, but the cpu is an R4400SC -> crash in r4k_scache_blast*.

 Are you sure CONF_SC isn't set?  That would be weird, it's one of the 
boot-mode settings so it would be hard to get it wrong.  What's printed 
upon bootstrap about caches?

 Anyway these days we apparently ignore the result of the S-cache probe 
and the sc_present variable.  The only values that determine whether an 
S-cache is present or not are: cpu_has_dc_aliases, cpu_has_ic_fills_f_dc 
and cpu_has_subset_pcaches which you need to get right for your 
configuration -- I guess cpu_has_dc_aliases == 0, cpu_has_ic_fills_f_dc == 
1 and cpu_has_subset_pcaches == 0 should be right to fulfil your needs 
(but it may break elsewhere).  Have I heard: "serious brain damage" from 
you?  Well, I couldn't agree more...

  Maciej

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