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Re: [patch 4/5] SiByte fixes for 2.6.12

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: [patch 4/5] SiByte fixes for 2.6.12
From: Andy Isaacson <adi@hexapodia.org>
Date: Thu, 23 Jun 2005 07:49:27 -0700
Cc: Andrew Isaacson <adi@broadcom.com>, linux-mips@linux-mips.org
In-reply-to: <Pine.LNX.4.61L.0506231208120.17155@blysk.ds.pg.gda.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20050622230151.GA17970@broadcom.com> <Pine.LNX.4.61L.0506231208120.17155@blysk.ds.pg.gda.pl>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.4.2i
On Thu, Jun 23, 2005 at 12:08:39PM +0100, Maciej W. Rozycki wrote:
> On Wed, 22 Jun 2005, Andrew Isaacson wrote:
> > If the CPU Options get out of sync with the CONFIG_CPU_ options,
> > cpu_cache_init() can end up being a noop.  Stop with a useful message
> > in that case rather than running on without cache functions.
> 
>  Wouldn't a build-time error be a better option?

The code looks like it's structured to be able to be compiled with
support for multiple CPUs, say, r4k and SB1; using #error would seem to
prevent that.

With the code as currently structured, you don't know it's going to be a
noop until runtime comes along and cpu_has_4ktlb is true...

-andy

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