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Re: Fix fallback atomic operations

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: Fix fallback atomic operations
From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 14 Jun 2005 08:23:39 +0100
Cc: linux-mips@linux-mips.org
In-reply-to: <Pine.LNX.4.61L.0506132131030.1725@blysk.ds.pg.gda.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <Pine.LNX.4.61L.0506132131030.1725@blysk.ds.pg.gda.pl>
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On Mon, Jun 13, 2005 at 09:40:20PM +0100, Maciej W. Rozycki wrote:

>  You may argue it's best to define a private copy of "cpu_has_llsc"  
> expanding to a constant for selecting the right set of atomic operations 
> at the compilation time and I would agree, but AFAIK the whole idea behind 
> our current implementation is to provide a snail-speed fallback or perhaps 
> to support more generic configurations at one point (e.g. one kernel for 
> all DECstations).
> 
>  For most processor settings the current setup already works, as they 
> provide ll/sc anyway, but not for MIPS I ones, like the R3k.  Here's a 
> patch that makes the affected code work for such processors as well.
> 
>  OK to apply?

Go ahead.

Al had a bunch of other complaints which I'll try to take care of asap.

  Ralf

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