Re: CVS Update@linux-mips.org: linux

[Ralf Baechle <ralf@linux-mips.org>]

On Fri, Jun 03, 2005 at 01:12:03PM +0200, Geert Uytterhoeven wrote:

> On Fri, 3 Jun 2005, Thiemo Seufer wrote:
> > --- include/asm-mips/hazards.h      3 Jun 2005 02:21:07 -0000       1.1.2.3
> > +++ include/asm-mips/hazards.h      3 Jun 2005 10:16:28 -0000
> > @@ -46,6 +46,7 @@
> >  #define mtc0_tlbw_hazard                                           \
> >     b       . + 8
> >  #define tlbw_eret_hazard
> 
> Missing backslash at end of line?


Some processors have a 0-cycle hazard between a tlb write and eret.

  Ralf