linux-mips
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Re: Porting To New System

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: Porting To New System
From: Cameron Cooper <developer@phatlinux.com>
Date: Sat, 28 May 2005 15:35:50 -0400
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>, Stanislaw Skowronek <sskowron@ET.PUT.Poznan.PL>, linux-mips@linux-mips.org
In-reply-to: <20050528192704.GA4995@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <Pine.GSO.4.10.10505271929510.25076-100000@helios.et.put.poznan.pl> <1117217584.5743.229.camel@localhost.localdomain> <1117223539.2921.15.camel@phatbox> <1117237244.5744.284.camel@localhost.localdomain> <1117294983.2800.12.camel@phatbox> <20050528192704.GA4995@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
> Your question would require a very long answer to be somewhat exhaustive,
> so here the express version.  Start by reading Documentation/cachetlb.txt
> from the kernel sources.  You can find plenty of discussions related to
> this code in the linux-mips and linux-kernel archives - especially the
> subtle points aren't exactly documented ;-)

Thanks, I'll check that out. However a new complexity has arisen. It
turns out that in addition to not having access to the MMU, we do not
have access to cp0. I'm afraid that this would require even more
rewriting of the kernel. Although I started this to learn something,
there might be more involved in this than I am prepared for.

Cameron


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