On Fri, 6 May 2005, Bryan Althouse wrote:
> > This is not the direct `memory map' of the IDE drive's registers! It's an
> > indirect map, cfr. e.g.
> > #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
> > So the actual register is found by looking up offset IDE_DATA_OFFSET in
> > the array HWIF(drive)->io_ports.
> Yes, I understand. This is starting to make more sense. Here is what I
> have figured out: The first 8 offsets are normally 0-7, just like their
> array indexes. Index 8 and 9, IDE_CONTROLL_OFFSET and IDE_IRQ_OFFSET, were
> confusing me because I was expecting them to be the actual offset 8 and 9 --
> and I could not find any IDE adapter data sheets that showed them located as
> such. Now that I take a second look at ide_std_init_ports(), I see that the
> CONTROL register is treated as a special case, i.e. it is not expected to
> follow the STATUS register in address space. This jives with what I have
> seen in data sheets.
> It looks like the example that Alan contributed does not update
> HWIF(drive)->io_ports[IDE_IRQ_OFFSET]. Or at least I cant figure out where.
Indeed, macide passes 0 for ctrlport and irqport to ide_setup_ports(). If you
need another example, you can look at drivers/ide/legacy/gayle.c.
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- email@example.com
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds