linux-mips
[Top] [All Lists]

Common Flash Memory Interface

To: linux-mips@linux-mips.org
Subject: Common Flash Memory Interface
From: martin.nichols@oxinst.co.uk
Date: Fri, 22 Apr 2005 13:48:02 +0100
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Hi all,

Can anyone out there help?

I'm in the process of designing an Au1100 based board and this question has
both hardware
and software aspects.

I've arranged for a pair of Spansion S29GL256N 256Mbit flash roms to be
connected to the
Au1100 static bus. These devices are each 16bits wide and are connected to
upper and lower
halves of the 32 bit static bus at an address such that the boot code can
reside in them.
After boot, we want to use the remainder of the devices as flash disk using
one of the wear
leveling file systems. Each flash chip implements the Common Flash Memory
Interface standard,
but as they are arranged as 32 bits wide the devices are effectively
interleaved.

Can Linux support this arrangement?
If not, what do other folks do?

I think I could arrange the flash chips as 32M x 16 rather than 16M x 32 and
force the CPU
to boot from 16 bit wide ROM using the ROMSIZE pin on the Au1100. There is
obviously a
significant performance loss in doing this.

Finally, this email is not confidential and is for all Linux-Mips
addressees.

Regards and thanks,

Martin Nichols.

 ###  OXFORD INSTRUMENTS   http://www.oxford-instruments.com/  ### 

Unless stated above to be non-confidential, this E-mail and any 
attachments are private and confidential and are for the addressee 
only and may not be used, copied or disclosed save to the addressee.
If you have received this E-mail in error please notify us upon receipt 
and delete it from your records. Internet communications are not secure 
and Oxford Instruments is not responsible for their abuse by third 
parties nor for any alteration or corruption in transmission. 


<Prev in Thread] Current Thread [Next in Thread>