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Re: another 4kc machine check.

To: "Kevin D. Kissell" <kevink@mips.com>
Subject: Re: another 4kc machine check.
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Tue, 12 Apr 2005 16:22:34 +0100 (BST)
Cc: Greg Weeks <greg.weeks@timesys.com>, Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <004a01c53ed4$dab12b00$10eca8c0@grendel>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <42553E49.7080004@timesys.com> <4256991C.4020601@timesys.com> <20050408161357.GB19166@linux-mips.org> <4256B524.2080509@timesys.com> <425AD440.5050600@timesys.com> <004a01c53ed4$dab12b00$10eca8c0@grendel>
Sender: linux-mips-bounce@linux-mips.org
On Mon, 11 Apr 2005, Kevin D. Kissell wrote:

> If the 4KC and 4KEC need it, so does the 4KSC (and 4KSD).

 But that's weird in the first place as 4Kc implements the original 
revision of MIPS32 so it does not implement "ehb".  Therefore it acts just 
as an ordinary "nop", but according to the 4K manual there is no need for 
one -- the hazard between a move to EntryLo0/EntryLo1 and tlbwi/tlbwr is 
explicitly listed as 0 instructions.

  Maciej

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