[PATCH] r4k_dma_cache_inv (arch/mips/mm/c-r4k.c)

[peter fuerst <pf@net.alphadv.de>]

Hi,

here's a (long outstanding) patch, that let's `r4k_dma_cache_inv' do what
it should do, instead of being a mere copy of `r4k_dma_cache_wback_inv'.
(There really are machines, where we occasionaly can't avoid to invalidate
cache(s) :)
Please apply. Thank you.

with best regards

pf

--- snip ---------------------------------------------------------------

diff -Nau -b -B arch/mips/mm/c-r4k.c.1.107 arch/mips/mm/c-r4k.c
--- arch/mips/mm/c-r4k.c.1.107  Fri Mar 18 17:36:53 2005
+++ arch/mips/mm/c-r4k.c        Tue Mar 22 23:35:23 2005
@@ -668,32 +668,24 @@
        if (cpu_has_subset_pcaches) {
                unsigned long sc_lsize = current_cpu_data.scache.linesz;
 
-               if (size >= scache_size) {
-                       r4k_blast_scache();
-                       return;
-               }
-
                a = addr & ~(sc_lsize - 1);
                end = (addr + size - 1) & ~(sc_lsize - 1);
                while (1) {
-                       flush_scache_line(a);   /* Hit_Writeback_Inv_SD */
+                       invalidate_scache_line(a);      /* Hit_Invalidate_SD/S 
*/
                        if (a == end)
                                break;
                        a += sc_lsize;
                }
                return;
        }
-
-       if (size >= dcache_size) {
-               r4k_blast_dcache();
-       } else {
+       {
                unsigned long dc_lsize = current_cpu_data.dcache.linesz;
 
                R4600_HIT_CACHEOP_WAR_IMPL;
                a = addr & ~(dc_lsize - 1);
                end = (addr + size - 1) & ~(dc_lsize - 1);
                while (1) {
-                       flush_dcache_line(a);   /* Hit_Writeback_Inv_D */
+                       invalidate_dcache_line(a);      /* Hit_Invalidate_D */
                        if (a == end)
                                break;
                        a += dc_lsize;