In include/asm-mips/ atomic.h, bitops.h and system.h there are a bunch
of inline functions which contain this logic:
if (cpu_has_llsc && R10000_LLSC_WAR) {
__asm__ (stuff)
} else if (cpu_has_llsc) {
__asm__ (other stuff)
} else {
C lang stuff;
}
My two observations relate to both code size and runtime performance.
These observations don't affect my situation, so I'm not inclined to
spend a bunch of time on it, but maybe someone else is interested. This
should be especially interesting since these inline functions are used
all over the kernel, so it might actually make a marginally significant
difference.
I suppose there's a reason this code is the way it is. If so, feel free
to ignore me or flame away.
1. If the first part of the if were an ifdef instead it would result in
a code size reduction as well as a runtime performance gain.
2. In atomic.h the "C lang stuff" is wrapped with a spinlock. In the
SMP case the spinlock will result in code that contains ll and sc
instructions, so I infer that there are no SMP system configs that use
CPUs that don't have the ll and sc instructions.
Paranoid version:
-----
if (cpu_has_llsc) {
#ifdef R10000_LLSC_WAR
__asm__ (stuff)
#else
__asm__ (other stuff)
#endif
} else {
#ifdef CONFIG_SMP
panic("SMP on CPUs with no LLSC is broken\n");
#else
C lang stuff;
#endif
}
-----
Most efficient version:
-----
#ifndef CONFIG_SMP
if (cpu_has_llsc)
#endif
{
#ifdef R10000_LLSC_WAR
__asm__ (stuff)
#else
__asm__ (other stuff)
#endif
}
-----
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