| To: | Nigel Stephens <nigel@mips.com> |
|---|---|
| Subject: | Re: c-r4k.c cleanup |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Fri, 4 Feb 2005 15:58:03 +0100 |
| Cc: | Atsushi Nemoto <anemo@mba.ocn.ne.jp>, linux-mips@linux-mips.org |
| In-reply-to: | <4203890B.5030305@mips.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20050204.231254.74753794.anemo@mba.ocn.ne.jp> <4203890B.5030305@mips.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.1i |
On Fri, Feb 04, 2005 at 02:39:07PM +0000, Nigel Stephens wrote: > The MIPS 24K family's caches are not physically indexed, but they do > have optional h/w assist to prevent aliases in certain cache > configurations. This optional feature is indicated by the read-only AR > (alias removed) flag being set - that's bit 16 in the CP0 Config7 register. That's not a new feature in the MIPS world; the R10000 family introduced that first and Linux knows how to make use of it. So now I just need to teach c-r4k.c to check the AR bit on the 24K. Ralf |
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