| To: | Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | Re: [PATCH] TX4927 processor can support different speeds |
| From: | Manish Lachwani <mlachwani@mvista.com> |
| Date: | Sun, 23 Jan 2005 12:39:42 -0800 |
| Cc: | Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de>, linux-mips@linux-mips.org |
| In-reply-to: | <20050123195129.GA1806@linux-mips.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20050123192318.GA22681@prometheus.mvista.com> <20050123194140.GL15265@rembrandt.csv.ica.uni-stuttgart.de> <20050123195129.GA1806@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.4.2) Gecko/20040308 |
Ralf Baechle wrote: On Sun, Jan 23, 2005 at 08:41:40PM +0100, Thiemo Seufer wrote:Based on the feedback from Toshiba, the TX4927 processor can support different speeds. Attached patch takes care of that. If you find this approach reasonable, can you please check it inShoudn't this better be tunable via /proc?By the time that interface becomes available interrupt timers would already have been missprogrammed. Try to calibrate the CPU timer against some external timer such as the RTC instead. It's already being done on the Indy. Ralf Hi Ralf, Why is this approach (in the patch) bad? Thanks Manish Lachwani |
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