| To: | "Maciej W. Rozycki" <macro@linux-mips.org> |
|---|---|
| Subject: | Re: dcache issue... |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Thu, 20 Jan 2005 15:34:14 +0100 |
| Cc: | moreau francis <francis_moreau2000@yahoo.fr>, linux-mips@linux-mips.org |
| In-reply-to: | <Pine.LNX.4.61L.0501201414250.18294@blysk.ds.pg.gda.pl> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20050120140025.96779.qmail@web25101.mail.ukl.yahoo.com> <Pine.LNX.4.61L.0501201414250.18294@blysk.ds.pg.gda.pl> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.1i |
On Thu, Jan 20, 2005 at 02:18:00PM +0000, Maciej W. Rozycki wrote: > > > Live is tough, use caches ;-) > > > > oh yes it is. But I would only understand what was > > my problem using the mixed cache modes... > > Note that ll/sc sequences don't work as expected on uncached memory, so > atomic accesses are not going to work in the kernel memory in your > configuration. This may cause arbitrary corruptions due to an > inconsistent state of the kernel. Uniprocessor systems are usually get away with it but it's not something real software should rely on. Ralf |
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