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Re: dcache issue...

To: moreau francis <francis_moreau2000@yahoo.fr>
Subject: Re: dcache issue...
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Thu, 20 Jan 2005 14:18:00 +0000 (GMT)
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <20050120140025.96779.qmail@web25101.mail.ukl.yahoo.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20050120140025.96779.qmail@web25101.mail.ukl.yahoo.com>
Sender: linux-mips-bounce@linux-mips.org
On Thu, 20 Jan 2005, moreau francis wrote:

> > Live is tough, use caches ;-)
> 
> oh yes it is. But I would only understand what was
> my problem using the mixed cache modes...

 Note that ll/sc sequences don't work as expected on uncached memory, so 
atomic accesses are not going to work in the kernel memory in your 
configuration.  This may cause arbitrary corruptions due to an 
inconsistent state of the kernel.

  Maciej

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